Semiconductor integrated circuits have been found to have great advantages in computer memory. The cost per bit of storage and speed of operation provided by N-channel MOS random access memory (RAM) devices have resulted in wide acceptance thereof in the manufacture of digital equipment, particularly minicomputers. One example of such a device, a 4096 bit RAM, is shown and described in U.S. Pat. No. 3,909,631, filed Aug. 2, 1973 by Norishisa Kitagawa.
Typically, a semiconductor RAM accepts a multiple bit address from external circuitry, which address functions to select a specific cell (or cells) within the RAM for writing in data or reading out data. The address is generated by other parts of the system, separate from the RAM; a requirement placed on the circuitry of the RAM is that the timing and voltage levels or logic levels of the address signals which it responds to must be compatible with the remainder of the system. Often the logic levels in the system are dictated by bipolar or TTL operating voltages, rather than those of MOS devices. It is also most preferable that the address inputs to the RAM impose a minimum of current loading on the external circuits, and that a minimum of noise or unwanted voltage variations be generated by the address signal detecting circuitry. A major requirement of the address buffer circuitry is that it causes the memory device to be responsive to the address signals during only a small window in time during the operating cycle of the digital equipment, so that the address signals may change to set up the next access cycle before the existing cycle is completed. While the buffer circuit of the invention is described in reference to a RAM, it can find utility in other semiconductor memory devices, such as read only memories (ROM's), or other MOS circuits.
It is therefore the object of the invention to provide an improved circuit for detecting address signals or other logic levels in semiconductor memory devices or the like, particularly a circuit which is compatible in response timing, voltage level, and loading with the remainder of the system in which the device may be used.